Dr. Mrinal Goswami

Dr. Mrinal Goswami

About

Specialization:
Quantum Computing, Reversible Logic, Post CMOS Technology (QCA), AI in Healthcare, Cyber Security, Hardware Security

Qualification

Ph.D (Computer Science & Engineering)  – NIT Durgapur, West Bengal

M.Tech (Computer Science & Engineering) – NIT Durgapur, West Bengal

B.Tech (Computer Science & Engineering) – NERIST, Nirjuli, Itanagar

Personal Interest

Travel

Working Experience

  1. Associate Professor (March 2023- Till Date) in the Department of Computer Science and Engineering, Assam down town University, Guwahati, Assam 
  2. Associate Professor (Feburary 2023- March 2023) in the Department of Computer Science and Engineering, Assam Kaziranga University, Jorhat, Assam 
  3. Assistant Professor (February 2019 – February 2023 ) in the School of Computer Science, University of Petroleum and Energy Studies Dehradun, Uttarakhand
  4. Assistant Professor (January 2015 – December 2015) in the Department of Computer Science & Engineering, North Eastern Regional Institute of Science and Technology (NERIST) (Deemed University, Under Govt. Of India), Arunachal Pradesh
  5. Assistant Professor (August 2014 – December 2014) in the Department of Computer Science & Engineering, NITS Mirza, Assam

Research

Journal Publications:

  1. Mrinal Goswami, J. Pal, M. Roy Choudhury, P. P. Chougule and B. Sen, "In memory computation using quantum-dot cellular automata," in IET Computers & Digital Techniques, vol. 14, no. 6, pp. 336-343, 11 2020, DOI: 10.1049/iet-cdt.2020.0008. (SCIE, Impact Factor: 0.803) (Post PhD)
  2. Mrinal Goswami, Mayukh Roychoudhury, Joydeb Sarkar,  Bibhash Sen and Biplab K. SikdarAn Efficient Inverter Logic in Quantum-Dot Cellular Automata for Emerging Nanocircuits” Arabian Journal for Science and Engineering (Springer), Vol 45, Page 2663–2674, 2019,   DOI 10.1007/s13369-019-04103-2 (SCIE, Impact Factor: 2.334) (PhD Work)
  3. Mrinal Goswami, Bibhash Sen, Rijoy Mukherjee and Biplab K Sikdar “Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic” Microelectronics Journal (Elsevier), Volume 60, February 2017, Pages 1-12, ISSN 0026-2692  (SCIE, Impact Factor: 1.605) (PhD Work)
  4. Mrinal Goswami, Anindan Mondal, Mahabub Hasan Mahalat, Bibhash Sen and Biplab K. Sikdar "An Efficient Clocking Scheme for Quantum-dot Cellular Automata" Journal of Electronics Letters (Taylor and Francis) Pages 83-96, Vol 8, Issue 1, 2019, DOI = 10.1080/21681724.2019.1570551 (Scopus Index) (PhD Work)
  5. Mrinal Goswami, Subrata Chattopadhyay, Shiv Bhushan Tripathi Shivam and Bibhash Sen “Design of Fault Tolerant Majority Voter for Error Resilient TMR Targeting Micro to Nano Scale Logic” Journal of  Computational Science and Engineering (Inderscience), Vol 21, No 3,  Page 375 – 393, 2020, DOI: 10.1504/IJCSE.2020.106062  (Scopus Index) (PhD Work)
  6. Bibhash Sen, Mayukh R. Chowdhury, Rijoy Mukherjee, Mrinal Goswami and Biplab K Sikdar “Reliability-aware design for programmable QCA logic with scalable clocking circuit” Journal of Computational Electronics (Springer), Volume 16, Issue 2, June 2017, Pages 473-485, ISSN 1572-8137. (SCIE, Impact Factor: 1.807) (PhD Work)
  7. Bibhash Sen, Mrinal Goswami, Subhra Mazumdar, Biplab K Sikdar, “Towards modular design of reliable quantum-dot cellular automata logic circuit using multiplexers, Journal of Computers & Electrical Engineering (Elseiver), Volume 45, July 2015, Pages 42-54, ISSN 0045-7906, http://dx.doi.org/10.1016/j.compeleceng.2015.05.001. (SCIE, Impact Factor: 3.818) (Pre PhD)
  8. Bibhash Sen, Manojit Dutta, Mrinal Goswami, Biplab K. Sikdar, “Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability, Microelectronics Journal (Elseiver), Volume 45, Issue 11, November 2014, Pages 1522-1532, ISSN 0026-2692, http://dx.doi.org/10.1016/j.mejo.2014.08.012. (SCIE, Impact Factor: 1.605) (Pre PhD)
  9. D Bhowmik, J Pal, P Sen, Mrinal Goswami, AK Saha and B Sen “Systematic Cell placement in Quantum-dot Cellular Automata Embedding Underlying Regular Clocking Circuit” IET Circuits, Devices & Systems, Vol 15, Issue 2, PP 156-167, 2021, https://doi.org/10.1049/cds2.12015 (SCIE, Impact Factor:1.297) (Post PhD)
  10. Jayanta Pal, Mrinal Goswami, Apu Kumar Saha and Bibhash Sen “CFA: Toward the Realization of Conservative Full Adder in QCA with Enhanced Reliability” Journal of Circuits, Systems and Computers, Vol 30, No 11, 2021, https://doi.org/10.1142/S0218126621501723 (SCIE, Impact Factor:1.333) (Post PhD)
  11. Mrinal Goswami, Rohit Tanwar, Prashant Rawat and Bibhash Sen “Configurable memory designs in quantum-dot cellular automata. Int. j. inf. tecnol. (2021). Vol 13, PP 1381–1393  https://doi.org/10.1007/s41870-021-00687-x (Scopus Index) (Post PhD)
  12. Mrinal Goswami, Jayanta Pal, Rohit Tanwar and Prashant Rawat “A modular approach to design ternary content addressable memory architecture in quantum dot cellular automata” Vol 14, PP 41–47 , 2022, DOI: 10.1007/s41870-021-00836-2 (Scopus Index)  (Post PhD)
  13. Jayanta Pal, Amit Kumar Pramanik, Mrinal Goswami, Apu Kumar Saha and Bibhash Sen “ Regular Clocking Based Emerging Technique in QCA Targeting Low Power Nano Circuits” International Journal of Electronics  2021, DOI: 10.1080/00207217.2021.1972473 (SCI) (Post PhD)

Conference Publications (International):

  1. Mrinal Goswami, Mayukh Roy Choudhury, Bibhash Sen “A Realistic Configurable Level Triggered Flip-Flop in Quantum-Dot Cellular Automata” 23rd International Symposium on VLSI Design and Test (VDAT-2019) at IIT Indore, PP 455-467, 2019, DOI: 10.1007/978-981-32-9767-8_38
  2. Mrinal Goswami, Govind Raj, Aron Narzary and Bibhash Sen “A Methodology to Design Online Testable Reversible Circuits” 22nd International Symposium on VLSI Design and Test (VDAT-2018) at Thiagarajar College of Engineering, Madurai, Chennai. June 2018, DOI: 10.1007/978-981-13-5950-7_28 
  3. Mrinal Goswami, Kumar Mohit and Bibhash Sen “Cost effective realization of XOR logic in QCA” 7th  IEEE International Symposium on Embedded Computing and System Design (ISED), Pages:1–5, December 2017, DOI: 10.1109/ISED.2017.8303950
  4. Mrinal Goswami, Aron Narzary, Govind Raj and Bibhash Sen “Design of reversible bidirectional logarithmic barrel shifter”  7th IEEE International Symposium on Embedded Computing and System Design (ISED), Pages:1–4, December 2017, DOI:10.1109/ISED.2017.8303921  
  5. Mrinal Goswami, Bibhash Sen and Biplab K. Sikdar “Design of low power 5-input Majority Voter in Quantum-dot Cellular Automata with effective Error Resilience” 6th IEEE International Symposium on Embedded Computing & System Design” Page: 101-105, December 2016     DOI: 10.1109/ISED.2016.7977063
  6. Mrinal Goswami; B. Kumar; H. Tibrewal; S. Mazumdar, "Efficient realization of digital logic circuit using QCA multiplexer," 2nd IEEE International Conference on Business and Information Management (ICBIM), vol., no., pp.165,170, 9-11 Jan. 2014 doi: 10.1109/ICBIM.2014.6970972
  7. Shiv Bhusan Tripathi, Aron Narzary, Rahul Toppo, Mrinal Goswami and Bibhash Sen “Designing Efficient Configurable QCA Nano Circuit for Morphological Operations in Image Processing” 8th  International Conference on Applied Physics and Mathematics (ICAPM 2018), Phuket, Thailand, Volume 1039, January 27-29, 2018 (Published under licence by IOP Publishing Ltd)
  8. Mahabub Hasan Mahalat, Mrinal Goswami, Subhranil Mondal, Anindan Mondal and Bibhash Sen “Design of fault tolerant nano circuits in QCA using explicit cell interaction” IEEE Calcutta Conference (CALCON), Page: 36-40, Dec. 2017, DOI: 10.1109/CALCON.2017.8280691
  9. Subrata Chattopadhyay, Shiv Bhushan Tripathi, Mrinal Goswami and Bibhash Sen “Design of Fault Tolerant Majority Voter for TMR Implementation in QCA” 20th IEEE International Symposium on VLSI Design and Test (VDAT), Page 1-2, May 2016.  DOI: 10.1109/ISVDAT.2016.8064905
  10. B. Sen, Mrinal Goswami, S. Some and B.K. Sikdar “Design of Sequential Circuits in Multilayer QCA Structure” IEEE International Symposium on Electronic System Design (ISED), Dec,2013 ,PP-21-25, DOI= 10.1109/ISED.2013.11
  11. Meghna Barthwal, Keshav Garg, and Mrinal Goswami “An Automated IoT Enabled Parking System” is accepted at International Conference on Machine Intelligence and Data Science Applications, UPES, Dehradun, September 2020.

 

Awards & Achievements

  1. Recipient of Visvesvaraya Ph.D. fellowship at Ph.D. level (2016 – 2019)
  2. Delivered an invited talk on “Introduction to Quantum Computing” in the Department of Information Technology Tripura University under AICTE Training and Learning Academy, Govt. of India
  3. Participated in TEQIP-III sponsored workshop “Robotics and Assistive Technologies (RAT 2019)” at NIT Durgapur during 3-5 January 2019
  4. Participated (also presented) in the Research Evaluation workshop “Visvesvaraya PhD Scheme for Electronics & IT/ITES Fourth workshop for presentation of research work” at MNIT Jaipur during 13-15 September 2018
  5. Participated one-week short-term course on “ETV II: Hardware Security and its Application” at NIT Durgapur during 6-10 March 2018
  6. Participated 5 days GIAN course on “Advance Topics in Software Testing, Debugging and Program Analysis” at NIT Durgapur from 26th July -31st July 2017
  7. Participated in the pre-conference summer school on “Reversible Computation” at Pride Plaza Hotel, Kolkata, India on July 5, 2017 (Organized by IIT Kharagpur, ISI Kolkata, IIEST Shibpur, Jadavpur University, Kolkata and University of Calcutta )
  8. Participated one-week short-term course on “Methodology & Ethics in Research” at NIT Durgapur from 19-23 September 2016
  9. Participated 4 days of GIAN course on “Recent Advances in VLSI Testing and Design-for Test: Timing Test, Test Compression, Cell Aware Test and Adaptive Test” at MNIT Jaipur from 25-29 July 2016
  10. Participated one-week GIAN course on “Custom IC Design using Cadence Tool & HDL Synthesis and implementation on FPGA” at NIT Meghalaya from 6-11 June 2016
  11. Participated in TEQIP sponsored two-week Induction Training Program on “Pedagogy and Research Methodology” at the North Eastern Regional Institute of Science & Technology (11th -20th Sept-2015)(Organized by NERIST, Arunachal Pradesh in collaboration with National Institute of Technical Teachers' Training & Research (NITTTR), Kolkata)
  12. Participated two-week ISTE STTP on “Introduction to Design of Algorithm” at NERIST conducted by IIT Kharagpur from 27th April to 30th May 2015 under National Mission on Education through ICT (MHRD).
  13. Participated in two days conference on “COMPUTING, COMMUNICATION AND INFORMATION PROCESSING” at North Eastern Regional Institute of Science & Technology, Nirjuli, Arunachal Pradesh from May 2-3,2015
  14. Participated in two days workshop on “Nano-Electronics and Biochips” at Indian Statistical Institute, Kolkata from 18-19 March 2014.
  15. Participated in One week short term course/workshop on “Emerging Trends in VLSI” at NIT Durgapur from 17-21 February 2014
  16. Attended 30 days of Industrial Training from 15th June to 15th July, 2011 at IOCL (Guwahati Refinery), Guwahati.
  17. Participated in ROBOKRITI-NXT, a workshop based on fundamentals of Robotics & Electronics conducted by TECHNOPHILIA in association with IIT Kanpur TECHKRITI’10 on 2nd - 3rd April, 2010.
  18. Attended a certificate course “COMPUTER HARDWARE & NETWORKING” “Assam Engineering Institute, Guwahati-3” (aided by Ministry of Communication & Information Technology, Govt. of India) from 23rd April, 2007 to 24th July, 2007 with grade ‘A’